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19-0566; Rev 0; 7/06
KIT ATION EVALU LE B AVAILA
1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
General Description
The MAX2059 high-linearity digital-variable-gain amplifier (DVGA) is designed to provide 56dB of total gain range and typical output IP3 and output P1dB levels of +31.8dBm and +18.4dBm, respectively. The device is ideal for a variety of applications, including single and multicarrier 1700MHz to 2200MHz DCS 1800/PCS 1900 EDGE, cdma2000(R), WCDMA/UMTS, and TD-SCDMA base stations. The MAX2059 yields a high level of component integration, which includes two 5-bit digital attenuators, a two-stage driver amplifier, a loopback mixer, and a serial interface to control the attenuators. The MAX2059 is pin compatible with the MAX2058 700MHz to 1200MHz DVGA, facilitating an easy design-in for applications where a common PC board layout is used for both frequency bands. The MAX2059 is available in a 40-pin thin QFN package with an exposed paddle. Electrical performance is guaranteed over a -40C to +85C temperature range. +31.8dBm Typical Output IP3 +18.4dBm Typical Output 1dB Compression Point 1700MHz to 2200MHz RF Frequency Range 700MHz to 1200MHz RF Frequency Range (MAX2058) 10.9dB Typical Small-Signal Gain Includes Two Independent 5-Bit Digital Attenuator Stages, Yielding 56dB of Total Gain-Control Range with 1dB Steps 3-Wire SPITM/MICROWIRETM Compatible Integrated Loopback Mixer for Tx/Rx SelfDiagnostics +5V Single-Supply Operation External Current-Setting Resistors for Scalable Device Power Lead-Free Package Available
Features
MAX2059
Applications
DCS 1800/PCS 1900 EDGE Base-Station Transmitters and Power Amplifiers cdmaOneTM and cdma2000 Base-Station Transmitters and Power Amplifiers WCDMA, TD-SCDMA, and Other 3G Base-Station Transmitters and Power Amplifiers Transmitter Gain Control Receiver Gain Control Broadband Systems Automatic Test Equipment Digital and Spread-Spectrum Communication Systems Microwave Terrestrial Links
Ordering Information
PART MAX2059ETL MAX2059ETL-T MAX2059ETL+ TEMP RANGE -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 40 Thin QFN-EP* (6mm x 6mm) 40 Thin QFN-EP* (6mm x 6mm) 40 Thin QFN-EP* (6mm x 6mm) 40 Thin QFN-EP* (6mm x 6mm) PKG CODE T4066-3 T4066-3 T4066-3 T4066-3
MAX2059ETL+T -40C to +85C
*EP = Exposed paddle. +Denotes lead-free package. T = Tape-and-reel. Pin Configuration/Functional Diagram appears at end of data sheet.
cdma2000 is a registered trademark of Telecommunications Industry Association. cdmaOne is a trademark of CDMA Development Group. SPI is a trademark of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
MAX2059
ABSOLUTE MAXIMUM RATINGS
VCC to GND ...........................................................-0.3V to +5.5V RSET1, RSET2......................................................+1.2V to +4.0V LBBIAS .......................................................(VCC - 1.5V) to +5.5V LB_EN, DATA, CS, CLK .............................-0.3V to (VCC + 0.3V) ATTEN_INA, ATTEN_INB, ATTEN_OUTA, ATTEN_OUTB Input Power .................................................................+24dBm AMPIN, Differential LO Input Power ...............................+12dBm Continuous Power Dissipation (TA = +70C) 40-Pin TQFN (derated 26.3mW/C above +70C) ......2100mW Operating Temperature Range (Note A) .............-40C to +85C Junction Temperature ......................................................+150C JC ....................................................................................10C/W JA ....................................................................................38C/W Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Note A: TC is the temperature on the exposed paddle of the package.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, R1 = 1.2k, R2 = 2k, R3 = 2k, TC = -40C to +85C. Typical values are at VCC = +5.0V and TC = +25C, unless otherwise noted.) (Note 1)
PARAMETER Supply Voltage Total Supply Current SYMBOL VCC ICC CONDITIONS Reference to VCC, VCCLB, VCCLOGIC, VCCBIAS1, VCCBIAS2, VCCAMP LB mixer disabled (LB_EN = 1) LB mixer enabled (LB_EN = 0) 2.4 0.8 0.01 0.01 MIN 4.75 TYP 5.0 189 217 MAX 5.25 241 275 UNITS V mA
LOGIC INPUTS (DATA, CS, CLK, LB_EN) Input High Voltage Input Low Voltage Input Current with Logic-High Input Current with Logic-Low VIH VIL IIH IIL V V A A
AC ELECTRICAL CHARACTERISTICS
(MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, PLO = -6dBm, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.) (Note 1)
PARAMETER RF Frequency (Note 2) Small-Signal Gain Gain Variation vs. Temperature Output Power Output Power Flatness Attenuation Range Output 3rd-Order Intercept Point OIP3 Two tones: fRF1 = 1850MHz, fRF2 = 1851MHz, POUT1 = POUT2 = +5dBm POUT AV SYMBOL MAX2058 MAX2059 fRF = 1850MHz, TC = +25C All attenuation settings TC = -40C to +25C TC = +25C to +85C 8.0 1800MHz to 2000MHz 2000MHz to 2200MHz CONDITIONS MIN 700 1700 8.0 10.9 -0.024 -0.032 10.9 -0.77 -2 56 31.8 13.3 TYP MAX 1200 2200 13.3 UNITS MHz dB dB/C dBm dB dB dBm
PIN = 0dBm, fRF = 1850MHz, TC = +25C PIN = 0dBm
2
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1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, PLO = -6dBm, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.) (Note 1)
PARAMETER Output -1dB Compression Point RMS Error Vector Magnitude Spurious Emissions in 30kHz Bandwidth Noise Figure Input Return Loss Output Return Loss 5-BIT DIGITAL ATTENUATORS Insertion Loss Attenuator measured separately ZS = ZL = 50 IIP3 Attenuator measured separately ZS = ZL = 50, two tones: fRF1 = 1850MHz, fRF2 = 1851MHz, PIN1 = PIN2 = +5dBm (Note 5) 1800MHz to 2000MHz 2000MHz to 2200MHz 1800MHz to 2200MHz, TC = -40C to +25C 1800MHz to 2200MHz, TC = +25C to +85C 1800MHz to 2000MHz, all states represented. For steps 0-23dB, accuracy is significantly improved. See Typical Operating Characterisitcs. 1800MHz to 2000MHz, all states represented. For steps 0-23dB, accuracy is significantly improved. See Typical Operating Characterisitcs. No RF input, attenuator A stepped from 0 to 2dB, 7dB to 9dB, 15dB to 17dB, 0 to 31dB, 31dB to 0dB, with attenuator B at 0dB; attenuator B stepped from 0 to 2dB, 7dB to 9dB, 15dB to 17dB, 0 to 31dB, 31dB to 0dB, with attenuator A at 0dB (Note 6) 5 dB NF 50 source, minimum attenuation setting 50 load, minimum attenuation setting SYMBOL OP1dB EVM (Note 3) POUT = +12dBm, EDGE modulation 200kHz offset POUT = +12dBm, EDGE modulation (Note 4) 400kHz offset 600kHz offset 1.2MHz offset CONDITIONS MIN TYP 18.4 0.5 -39.1 -72.5 -83.1 -85.7 8.1 19 24 dB dB dB dBc MAX UNITS dBm %
MAX2059
Input 3rd-Order Intercept Point Control Range Attenuation Step Size Variation vs. Frequency
40 28 0.17 0.29 0.011
dBm dB dB
Attenuation Variation vs. Temperature Step Size
dB/C 0.023 1 +0.53 -0.97 dB
Relative Step Accuracy
dB
Absolute Step Accuracy
-3.5 +0.3
dB
Spurious Emissions in 300kHz Bandwidth
-89
dBm
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3
1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
MAX2059
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, PLO = -6dBm, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.) (Note 1)
PARAMETER Switching Speed LOOPBACK MIXER LO Frequency LO Input Power Output Power Gain Accuracy Output 3rd-Order Intercept Point Output Noise Floor ON/OFF Switching Time LBOUT to ATTEN_OUTB Isolation ATTEN_OUTB to LBOUT Isolation Output Return Loss LO Port Return Loss SERIAL PERIPHERAL INTERFACE (SPI) Maximum Clock Speed Data to Clock Setup Time Data to Clock Hold Time Clock to CS Setup Time CS Positive Pulse Width CS Negative Pulse Width Clock Pulse Width tCS tCH tES tEW tEWN tCW 38 1 9 4 18 24 13 MHz ns ns ns ns ns ns OIP3 fLO PLO PIN = +5dBm, fRF = 1850MHz, TC = +25C (Note 7) PIN = +5dBm, TC = -40C to +85C 1800MHz to 2000MHz 2000MHz to 2200MHz -15.4 (Note 2) 40 -6 -12.6 2.2 2.2 6.2 -137 0.12 0.12 55 50 20 13 28 100 0 -9.6 MHz dBm dBm dB dBm dBc/Hz s dB dB dB dB SYMBOL CONDITIONS From chip select transitioning high to the output settling to within 1dB of steady state output MIN TYP 0.3 MAX UNITS s
Two tones: fRF1 = 1850MHz, fRF2 = 1850.2MHz, PIN1 = PIN2 = +2dBm, TC = +25C PIN = +5dBm LB_EN enable time LB_EN disable time Mixer enabled, attenuators A and B both set to 31dB, PIN = +5dBm Mixer disabled, PIN = 0dBm Mixer enabled, 50 load Mixer disabled, 50 load 50 source
Note 1: All limits include external component losses. Output measurements taken at RFOUT or LBOUT ports of the Typical Application Circuit. Note 2: Operating outside this range is possible, but with degraded performance of some parameters. Note 3: Compression point characterized. It is advisable not to continuously operate the VGA RF input above +15dBm. Note 4: Input RF source contribution to spurious emissions (Agilent ESG 4435B, PSA E4443A): 200kHz = -39.2dBc, 400kHz = -73.5dBc, 600kHz = -83.2dBc, 1.2MHz = -85.7dBc Note 5: See the Applications Information section regarding effective attenuation range. Note 6: No SPI clock input applied. Note 7: Guaranteed by design and characterization.
4
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1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
MAX2059
Typical Operating Characteristics
(MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.)
GAIN vs. RF FREQUENCY* (MAXIMUM GAIN)
MAX12059 toc01
GAIN vs. RF FREQUENCY* (MAXIMUM GAIN)
MAX2059 toc02
GAIN vs. RF FREQUENCY* ADJUSTING ATTEN A
MAX2059 toc03
14 TC = -40C 12 10 GAIN (dB) 8 6 4 2 0
14 VCC = 5.25V 12 10 GAIN (dB)
15
5 GAIN (dB) VCC = 5.0V VCC = 4.75V
TC = +5C TC = +25C TC = +85C
8 6 4 2 0
-5
-15
-25 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
ATTEN A ABS ACCURACY vs. RF FREQUENCY
MAX2059 toc04
ATTEN A REL ACCURACY vs. RF FREQUENCY
MAX2059 toc05
GAIN vs. RF FREQUENCY* ADJUSTING ATTEN B
MAX2059 toc06
3 2 1 0 ERROR (dB)
1.0 0.5 0 ERROR (dB)
15
5 GAIN (dB) 16dB ATTEN -1.5 STATES 24-31dB ATTEN 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) 24dB ATTEN -25 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
-1 -2 -3 -4 -5 -6
-0.5 -1.0
-5
-15
-2.0
ATTEN B ABS ACCURACY vs. RF FREQUENCY
MAX2059 toc07
ATTEN B REL ACCURACY vs. RF FREQUENCY
MAX2059 toc08
OUTPUT IP3 vs. RF FREQUENCY*
34 33 OUTPUT IP3 (dBm) 32 31 30 29 28 27 26 TC = +85C 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 2300 TC = +25C TC = +5C TC = -40C
MAX2059 toc09
3 2 1 0 ERROR (dB) -1 -2 -3 -4
1.0 0.5 0 ERROR (dB) -0.5 -1.0 -1.5 24dB ATTEN
35
-5 -6
STATES 24-31dB ATTEN 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
-2.0 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
25
*Off-chip tuning can improve performance for applications beyond 2200MHz. Contact factory for details. _______________________________________________________________________________________ 5
1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
MAX2059
Typical Operating Characteristics (continued)
(MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.)
OUTPUT IP3 vs. RF FREQUENCY*
MAX2059 toc10
NOISE FIGURE vs. RF FREQUENCY*
MAX2059 toc11
NOISE FIGURE vs. RF FREQUENCY*
MAX2059 toc12
35 34 33 OUTPUT IP3 (dBm) 32 31 30 29 28 27 26 25 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 VCC = 4.75V VCC = 5.0V VCC = 5.25V
14
14
12 TC = +85C NOISE FIGURE (dB)
TC = +25C
12 NOISE FIGURE (dB)
10
10
8
8 VCC = 4.75V, 5.0V, 5.25V
6 TC = -40C 4 2300 1700 1800
TC = +5C
6
4 1900 2000 2100 RF FREQUENCY (MHz) 2200 2300 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 2300
OUTPUT P1dB vs. RF FREQUENCY*
MAX2059 toc13
OUTPUT P1dB vs. RF FREQUENCY*
VCC = 5.25V 20 OUTPUT P1dB (dBm) 19 VCC = 5.0V 18 17 VCC = 4.75V 16 15 14
MAX2059 toc14
INPUT RETURN LOSS vs. RF FREQUENCY ATTEN A VARIED
5 INPUT RETURN LOSS (dB) 10 15 20 25 30 35 40 0dB 1dB 2dB 4dB
MAX2059 toc15
21 20 OUTPUT P1dB (dBm) 19 18 17 16 15 14 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 TC = +25C TC = -40C TC = +5C
21
0 16dB, 31dB 8dB
TC = +85C
2300
1700
1800
1900 2000 2100 RF FREQUENCY (MHz)
2200
2300
1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
INPUT RETURN LOSS vs. RF FREQUENCY ATTEN B VARIED
MAX2059 toc16
OUTPUT RETURN LOSS vs. RF FREQUENCY ATTEN A VARIED
MAX2059 toc17
OUTPUT RETURN LOSS vs. RF FREQUENCY ATTEN B VARIED
MAX2059 toc18
0 5 INPUT RETURN LOSS (dB) 10 0dB 15 20 25 30 35 40 45 31dB
0 5 OUTPUT RETURN LOSS (dB) 10 15 20 25 31dB 30 0dB
0 5 OUTPUT RETURN LOSS (dB) 10 15 20 25 30 2dB 4dB 0dB 1dB
16dB, 31dB
8dB
1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
*Off-chip tuning can improve performance for applications beyond 2200MHz. Contact factory for details. 6 _______________________________________________________________________________________
1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
MAX2059
Typical Operating Characteristics (continued)
(MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.)
REVERSE GAIN vs. RF FREQUENCY ADJUSTING ATTEN A AND B
MAX2059 toc19
MIXER CONV LOSS vs. RF FREQUENCY
MAX2059 toc20
MIXER CONV LOSS vs. RF FREQUENCY
MAX2059 toc21
-30
25.0 TC = +85C 22.5 CONVERSION LOSS (dB) 20.0 17.5 15.0 TC = -5C 12.5 10.0 TC = +5C TC = +25C
25.0 22.5 CONVERSION LOSS (dB) VCC = 4.75V 20.0 17.5 15.0 12.5 10.0 VCC = 5.25V VCC = 5.0V
-40
GAIN (dB)
-50
ATTEN A AND B, 0dB
-60
-70
ATTEN A OR B, 31dB 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
-80
1700
1800
1900 2000 2100 RF FREQUENCY (MHz)
2200
2300
1700
1800
1900 2000 2100 RF FREQUENCY (MHz)
2200
2300
MIXER CONV LOSS vs. RF FREQUENCY
MAX2059 toc22
MIXER OUTPUT IP3 vs. RF FREQUENCY
MAX2059 toc23
MIXER OUTPUT IP3 vs. RF FREQUENCY
9 8 OUTPUT IP3 (dBm) 7 6 VCC = 4.75V 5 4 VCC = 5.0V VCC = 5.25V
MAX2059 toc24
25.0 PLO = -3dBm 22.5 CONVERSION LOSS (dB) PLO = -6dBm 20.0 17.5 15.0 PLO = 0dBm 12.5 10.0 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200
10 9 8 OUTPUT IP3 (dBm) 7 6 5 4 3 2 TC = +85C TC = +5C TC = +25C TC = -40C
10
3 2 2200 2300 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 2300
2300
1700
1800
1900 2000 2100 RF FREQUENCY (MHz)
MIXER OUTPUT IP3 vs. RF FREQUENCY
9 8 OUTPUT IP3 (dBm) 7 6 5 4 3 2 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 2300 PLO = -6dBm PLO = -3dBm
MAX2059 toc25
MIXER OUTPUT RETURN LOSS vs. RF FREQUENCY (MIXER ENABLED)
MAX2059 toc26
MIXER OUTPUT RETURN LOSS vs. RF FREQUENCY (MIXER ENABLED)
5 10 VCC = 4.75V, 5.0V, 5.25V 15 20 25 30 35 40 1700 1800 1900 2000 2100 2200 RF FREQUENCY (MHz) 2300
MAX2059 toc27
10 PLO = 0dBm
0 MIXER OUTPUT RETURN LOSS (dB) 5 10 15 20 25 30 35 TC = +85C 40 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 TC = +25C TC = +5C TC = -40C
0 MIXER OUTPUT RETURN LOSS (dB)
2300
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7
1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
MAX2059
Typical Operating Characteristics (continued)
(MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.)
MIXER OUTPUT RETURN LOSS vs. RF FREQUENCY (MIXER DISABLED)
MAX2058 toc28
MIXER OUTPUT RETURN LOSS vs. RF FREQUENCY (MIXER DISABLED)
MAX2059 toc29
LO RETURN LOSS vs. LO FREQUENCY (MIXER ENABLED)
MAX2059 toc30
0 MIXER OUTPUT RETURN LOSS (dB) 5 10 15 20 25 30 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 TC = +85C TC = +25C
0 MIXER OUTPUT RETURN LOSS (dB) 5 10 15 20 25 VCC = 4.75V, 5.0V, 5.25V
0
TC = +5C
LO RETURN LOSS (dB)
TC = -40C
10 TC = +85C 20 TC = +25C
30 TC = -40C TC = +5C 30 40 1700 1800 1900 2000 2100 2200 RF FREQUENCY (MHz) 2300 0 50 100 150 LO FREQUENCY (MHz) 200
2300
LO RETURN LOSS vs. LO FREQUENCY (MIXER ENABLED)
MAX2059 toc31
ATTEN A ONLY (NO PC BOARD LOSS) GAIN vs. RF FREQUENCY
MAX2059 toc32
0
0
LO RETURN LOSS (dB)
10 GAIN (dB) 200
-10
20
VCC = 4.75V, 5.0V, 5.25V
-20
30
-30
40 0 50 100 150 LO FREQUENCY (MHz)
-40 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
ATTEN A ONLY ABS ACCURACY vs. RF FREQUENCY
MAX2059 toc33
ATTEN A ONLY REL ACCURACY vs. RF FREQUENCY
MAX2059 toc34
3 2 1 0 ERROR (dB) -1 -2 -3 -4
1.0 0.5 0 ERROR (dB) -0.5 -1.0 24dB ATTEN -1.5
-5 -6
STATES 24dB-31dB ATTEN 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
-2.0 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
8
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1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
MAX2059
Typical Operating Characteristics (continued)
(MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.)
ATTEN B ONLY (NO PC BOARD LOSS) GAIN vs. RF FREQUENCY
MAX2059 toc35
ATTEN B ONLY ABS ACCURACY vs. RF FREQUENCY
MAX2059 toc36
ATTEN B ONLY REL ACCURACY vs. RF FREQUENCY
MAX2059 toc37
0
3 2 1 0 ERROR (dB) -1 -2 -3
1.0 0.5 0 ERROR (dB) -0.5 -1.0 24dB ATTEN -1.5 -2.0
-10 GAIN (dB)
-20
-30
-4 -5 STATES 24dB-31dB ATTEN 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
-40 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
-6
1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz)
SUPPLY CURRENT vs. SUPPLY VOLTAGE (MIXER DISABLED)
MAX2059 toc38
SUPPLY CURRENT vs. SUPPLY VOLTAGE (MIXER ENABLED)
TC = +85C 230 SUPPLY CURRENT (mA) 220 210 200 190 TC = +25C
MAX2059 toc39
220 210 SUPPLY CURRENT (mA) 200 190 180 170 160 4.750 TC = +5C 4.875 5.000 VCC (V) TC = -40C 5.125 TC = +85C TC = +25C
240
TC = +5C 180 4.750 4.875 5.000 VCC (V)
TC = -40C 5.125 5.250
5.250
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9
1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
MAX2059
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10, 11, 13, 14, 16, 17, 19, 22, 24, 25, 26, 30, 32, 34, 35, 37, 38 12 15 18 20 21 23 27 28 29 31 33 36 39 40 EP NAME LO+ LOVCCLB LBOUT LB_EN DATA CLK CS VCCLOGIC FUNCTION Loopback Mixer Local Oscillator Positive Input Loopback Mixer Local Oscillator Negative Input Loopback Mixer Supply Voltage. +5V supply for the internal loopback mixer. Bypass to GND with 22pF and 0.1F capacitors as close as possible to the pin. Loopback Mixer RF Output. Internally matched to 50. AC-couple with a capacitor. Loopback Mixer Logic Input. Set to logic-low 0 to enable the mixer. Set to logic-high 1 to disable the mixer. SPI Digital Data Input SPI Clock Input SPI Chip-Select Input Logic Supply Voltage. +5V supply for the internal logic circuitry. Bypass to GND with 22pF and 0.1F capacitors as close as possible to the pin.
GND
Ground
ATTEN_OUTB Attenuator B Output. Internally matched to 50. VCC ATTEN_INB RSET2 VCCBIAS2 AMPOUT VCCAMP AMPIN VCCBIAS1 RSET1 Attenuator B Supply. +5V supply for attenuator B. Bypass to GND with 22pF and 0.01F capacitors as close as possible to the pin. Attenuator B Input. Internally matched to 50. Output Amplifier Bias-Current-Setting Resistor. Sets the bias current for the output amplifier stage. Connect a 2k resistor to ground. Bias Circuit Supply Voltage. +5V supply for the internal bias circuitry. Bypass to GND with 1000pF and 0.1F capacitors as close as possible to the pin. RF Amplifier Output. Internally matched to 50. RF Amplifier Supply Voltage. +5V supply for the RF amplifier. Bypass to GND with 1000pF and 0.1F capacitors as close as possible to the pin. RF Amplifier Input. Internally matched to 50. Bias Circuit Supply Voltage. +5V supply for the internal bias circuitry. Bypass to GND with 1000pF and 0.1F capacitors as close as possible to the pin. Input Amplifier Bias-Current-Setting Resistor. Sets the bias current for the input amplifier stage. Connect a 1.2k resistor to ground.
ATTEN_OUTA Attenuator A Output. Internally matched to 50. VCC ATTEN_INA LBBIAS EP Attenuator A Supply Voltage. +5V supply for attenuator A. Bypass to GND with 22pF and 0.01F capacitors as close as possible to the pin. Attenuator A Input. Internally matched to 50. Loopback Mixer Bias-Current-Setting Resistor. Sets the bias current for the mixer. Connect a 2k resistor to ground. Exposed Ground Paddle. Solder the exposed paddle to GND using multiple vias.
10
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1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
Detailed Description
The MAX2059 high-linearity DVGA consists of two 5-bit digital attenuators, a fixed-gain two-stage driver amplifier, a loopback mixer, and a serial interface to control the attenuators. This high level of component integration makes the MAX2059 ideal for base-station transmitter applications. The MAX2059 is designed to operate in the 1700MHz to 2200MHz frequency range. The overall cascaded performance of the MAX2059 produces a typical 10.9dB gain, a +31.8dBm OIP3, an 18.4dBm OP1dB, and a total 56dB gain-control range.
Driver Amplifier
The MAX2059 includes a two-stage medium power amplifier with a fixed 18.5dB gain. The driver amplifier circuit is optimized for high linearity and medium output power capability for the 1800MHz to 2000MHz frequency range. The driver amplifier is intended to amplify a modulated signal and drive a high-power amplifier in base-station transmitters. In a typical application, the driver amplifier is cascaded in between the two digital attenuators. See the Typical Application Circuit. The two-stage amplifier stage can be disabled for applications where only the digital attenuators and/or loopback mixer are used. To disable the two-stage amplifier, ground or leave unconnected the amplifier supplies VCCBIAS2, VCCAMP, VCCBIAS1, and also the inputs for setting the amplifier bias currents RSET1, RSET2. This reduces the supply current by approximately 187mA under typical conditions.
MAX2059
5-Bit Attenuators
The MAX2059 integrates two 5-bit digital attenuators to achieve a high dynamic range. Each attenuator is programmed with a 3-wire SPI interface, with a total effective range of 28dB and step size of 1dB. See the Applications Information section and Table 1 for attenuator programming details. The attenuators can be used for both static and dynamic power control.
Loopback Mixer
The MAX2059 loopback mixer uses a double-balanced active architecture designed to operate with a 1700MHz to 2200MHz RF frequency range, and a 40MHz to 100MHz LO frequency range. The RF port of the mixer is connected internally (with an on-chip switch) to the input of the first attenuator stage. The mixer's IF port is matched for a single-ended 50 impedance, while the LO port requires a differential input impedance of 100. The loopback mixer facilitates a self-diagnostic mode for cellular transceivers, whereby the Tx band signal at the input of the mixer can be translated up or down to the corresponding Rx band. This translated signal can then be fed back to the radio's receiver for complete Tx/Rx loop diagnostics. The loopback mixer is enabled and disabled with LB_EN. Set LB_EN to a logic-low 0 to enable the mixer, set LB_EN to a logic-high 1 to disable the mixer. The MAX2059 loopback mixer accepts a nominal -6dBm LO input power and exhibits a -12.6dBm output power and an output IP3 of 6.2dBm (PIN = +5dBm).
Table 1. Attenuator Programming
ATTENUATOR A (5 MSBs) Bit 9 = 16dB step Bit 8 = 8dB step Bit 7 = 4dB step Bit 6 = 2dB step Bit 5 = 1dB step ATTENUATOR B (5 LSBs) Bit 4 = 16dB step Bit 3 = 8dB step Bit 2 = 4dB step Bit 1 = 2dB step Bit 0 = 1dB step
Note: Due to finite circuit isolation, the total effective range of each attenuator is limited to 28dB.
DATA MSB
BIT 9
BIT 8
BIT 1
BIT 0
LSB
CLOCK tCS CS tEWN tCH
tCW
Applications Information
SPI Interface and Attenuator Settings
The two 5-bit attenuators are programmed with the 3wire SPI/MICROWIRE-compatible serial interface using 10-bit words. Bit 9 of the 10-bit data is shifted in first, along with all remaining data bits, on the rising edge of the clock regardless of CS being high or low. Once all the data bits are shifted in, all will be sent to the attenuators on the rising edge of CS, thus changing the attenuation state. For standard SPI operation, pull CS low for the
11
tES tEW
NOTES: DATA ENTERED ON CLOCK RISING EDGE. ATTENUATOR STATE CHANGE ON CS RISING EDGE.
Figure 1. SPI Timing Diagram
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1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
duration of a valid 10-bit data set (tEWN). This CS negative pulse width includes the setup time of the rising clock edge to CS transitioning high (tES). See Figure 1. The 5 MSBs of the 10-bit word program attenuator A, and the 5 LSBs of the 10-bit word program attenuator B. Each bit sets the attenuators to a corresponding attenuation level. For example, logic-low 0 for bit 5 and bit 0 of attenuator A and B, respectively, sets both attenuators at 1dB. 00000 configures both attenuators for maximum attenuation and 11111 sets for minimum attenuation. See Table 1 for programming details.
MAX2059
from the EP. In addition, provide the EP with a lowinductance path to electrical ground. The EP MUST be soldered to a ground plane on the PC board, either directly or through an array of plated via holes.
Table 2. Component List Referring to the Typical Application Circuit
COMPONENT C1, C4, C10, C13, C16 C2, C3, C5, C8, C11, C14, C17, C24 C6, C19 C7, C18 C9, C12, C15 C20, C21, C22 C23 R1 R2, R3 R4 TI U1 VALUE 0.1F 22pF 120pF 0.01F DESCRIPTION Microwave capacitors (0603) Microwave capacitors (0402) Microwave capacitors (0402) Microwave capacitors (0402)
External Bias
Bias currents for the two-stage amplifier and the loopback mixer are set and optimized with external resistors. Resistor R1 (pin 31) sets the bias current for the input amplifier, R2 (pin 20) sets the bias current for the output amplifier, and R3 (pin 40) sets the bias for the loopback mixer. The external biasing resistor values can be increased for reduced current operation at the expense of performance. Contact the factory for details.
1000pF Microwave capacitors (0402) 0.75pF Microwave capacitors (0402) 1pF 1.2k 2.0k 110 2:1 -- Microwave capacitor (0402) 1% resistor (0402) 1% resistors (0402) 1% resistor (0402) RF transformer (100:50) Mini-Circuits TC2-1T MAX2059
Board Layout
The pin configuration of the MAX2059 has been optimized to facilitate a very compact physical layout of the device and its associated discrete components. The exposed paddle (EP) of the MAX2059's thin QFNEP package provides a low thermal-resistance path to the die. It is important that the PC board on which the MAX2059 is mounted be designed to conduct heat
MAX5873 DUAL DAC I 12
MAX4395 QUAD AMP
MAX2021/MAX2022/MAX2023 ZERO-IF MODS/DEMODS
MAX2058/MAX2059 RF DIGITAL VGAs
90 Q 12
0
31dB
18.5dB
31dB RFOUT
SPI LOGIC
MAX9491 VCO + PLL
45, 80, OR 95MHz LO
LOOPBACK Rx SPI OUT OFF CONTROL (FEEDS BACK INTO Rx CHAIN FRONT-END)
Figure 2. Direct Conversion Transmitter for GSM/EDGE Base Stations 12 ______________________________________________________________________________________
1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
Direct-Conversion Base-Station Transmitter
The MAX2058/MAX2059 are designed to interface directly with Maxim's direct-conversion quadrature modulators and high-speed DACs to provide a complete solution for GSM/EDGE base-station transmitter applications. See Figure 2. The MAX2058/MAX2059, together with the MAX2021/MAX2022/MAX2023 directconversion modulators/demodulators, the MAX5873 dual-channel DAC, and the MAX4395 quad amplifier, form an ideal total transmitter lineup. This overall system is highly efficient and low cost, while maintaining high linearity and low-noise performance.
MAX2059
Typical Application Circuit
VCC RF INPUT C22 C19 ATTEN_OUTA R3 ATTN_INA LBBIAS R1 RSET1 C23 C17 C18
GND
GND
GND
GND
LO INPUT
T1 LO+ LOVCCLB C1 C2 LBOUT LB_EN DATA CLK CS VCCLOGIC C4 C5 GND
40 R4 1 2 3
39
38
37
36
35
34
33
GND 32
VCC
31 30 29 28 GND C15 VCCBIAS1 AMPIN VCCAMP C12 C13 C14
VCC
5-BIT ATTENUATOR A
C16
VCC
MAX2059 4 5 6 7 8 9 10 11 GND 12 ATTEN_OUTB 13 GND 14 GND 15 VCC 16 GND 17 GND 18 ATTEN_INB 19 GND 20 RSET2 R2 C24 C8 C7 5-BIT ATTENUATOR B E.P. SPI DRIVER AMP 27 VCC
C3 LBOUT
26 GND 25 24 23 22 21 GND GND
AMPOUT GND VCCBIAS2 C9 C10 C11 C20
VCC
VCC
C6 RF OUTPUT C21
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13
1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer
MAX2059
Pin Configuration/Functional Diagram
ATTEN_OUTA ATTEN_INA
LBBIAS
40 LO+ 1 LO- 2 VCCLB 3
39
38
37
36
35
34
33
32
5-BIT ATTENUATOR A
RSET1 31 30 GND 29 VCCBIAS1 28 AMPIN 27 VCCAMP 26 GND 25 GND 24 GND 23 AMPOUT 22 GND 21 VCCBIAS2 20 RSET2
GND
GND
GND
GND
MAX2059 LBOUT 4 LB_EN 5 DATA 6 CLK 7 CS 8 VCCLOGIC 9 GND 10 11 GND 12 ATTEN_OUTB 13 GND 14 GND 15 VCC 16 GND 17 GND 18 ATTEN_INB 19 GND 5-BIT ATTENUATOR B SPI DRIVER AMP
GND
VCC
Chip Information
PROCESS: SiGe BiCMOS
Package Information
For the latest package outline information, go to www.maxim-ic.com/packages.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2006 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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